Image pickup apparatus for processing an image signal by using memory

ABSTRACT

An image pickup apparatus comprising: an image pickup unit for outputting an image signal having a first number of pixels which is greater than a predetermined number of pixels; a converting unit for converting the image signal having the first number of pixels, outputted from the image pickup unit into an image signal having the predetermined number of pixels; a first memory having storage capacity corresponding to the predetermined number of pixels, for storing the image signal having the predetermined number of pixels, outputted from the converting unit; a second memory having a storage capacity corresponding to the first number of pixels, for storing the image signal having the first number of pixels, outputted from the image pickup unit; and a still image processing unit for outputting as still image data the image signal having the first number of pixels, read out from the second memory.

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The present invention relates to an image processing apparatus,and more particularly to an apparatus for processing image signalshaving different numbers of pixels by using memory.

[0003] 2. Related Background Art

[0004] Conventionally, there is known a digital VTR which is integratedinto a video camera for recording an image signal which has beencaptured by means of a video camera onto a magnetic tape as an imagesignal. Further, in recent years, a digital VTR has been developed whichis equipped with a memory card slot, and which records moving image dataonto a magnetic tape in a conventional manner, and which is also capableof recording a still image onto the memory card.

[0005] Meanwhile, due to the improvement of semiconductor technology inrecent years, the number of pixels in CCDs has increased dramatically,and one can conceive of even a digital VTR employing a CCD that has morepixels than that of conventional, to capture and record a still image.

[0006] However, the conventional digital VTR is designed based on thepremise that the moving image data and still image data are signalshaving exactly the same number of pixels. Therefore, when the number ofpixels in the CCD is increased as mentioned above and the number ofpixels in the still image data are also increased as a result thereof,it is then no longer possible to deal with the signals easily.

[0007] Further, in recent years, due to the stabilization of circuitproperties and decrease in electrical power consumption, it has becomenormal to arrange a moving image processing circuit, a still imageprocessing circuit and other various circuits including memory on thesame integrated circuit.

[0008] However, when the number of pixels of the image signal isincreased, memory having memory capacity corresponding to the number ofpixels of the image data is necessary particularly for still imageprocessing. However, when the memory for the still-image processing isalso arranged onto the same integrated circuit, then it is not possibleto add only the memory alone, or exchange the memory for another memoryhaving larger capacity. Therefore, it was necessary to redesign theintegrated circuit each time the number of pixels of the image signal isincreased, and this involves significant labor and costs.

SUMMARY OF THE INVENTION

[0009] An object of the present invention is to solve theabove-mentioned problem.

[0010] Other object of the present invention is to make it possible toprocess the moving image and still image data easily even in the casewhere the number of pixels of the image signal changes.

[0011] Still other object of the present invention is to make itpossible to process the still image data easily, without having to alterthe design of the integrated circuit even in the case where the numberof pixels of the image signal changes.

[0012] In order to attain the above-mentioned objects, according to oneaspect of the present invention, there is provided an image pickupapparatus comprising:

[0013] image pickup means for outputting an image signal having a firstnumber of pixels which is greater than a predetermined number of pixels;

[0014] converting means for converting the image signal having the firstnumber of pixels, outputted from the image pickup means, into an imagesignal having the predetermined number of pixels;

[0015] a first memory having storage capacity corresponding to thepredetermined number of pixels, for storing the image signal having thepredetermined number of pixels, outputted from the converting means;

[0016] a second memory having storage capacity corresponding to thefirst number of pixels, for storing the image signal having the firstnumber of pixels, outputted from the image pickup means; and

[0017] still image processing means for outputting as still image datathe image signal having the first number of pixels, read out from thesecond memory.

[0018] Other objects, features, and advantages of the present inventionwill be apparent from the following description taken in conjunctionwith the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In the accompanying drawings:

[0020]FIG. 1 is a diagram showing a construction of a VTR which isintegrated into a camera to which the present invention is applied;

[0021]FIG. 2 is a diagram showing a filter construction of an imagepickup device, used in an embodiment of the present invention;

[0022]FIG. 3 is a diagram showing a reduction processing; and

[0023]FIG. 4 is a diagram showing another construction of the VTRintegrated into the camera.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0024] Hereinafter, explanation will be made of an embodiment of thepresent invention with reference to the drawings.

[0025]FIG. 1 is a block diagram showing a construction of a digital VTR100 which is integrated into a camera to which the present invention isapplied. The digital VTR of the present invention is provided with acard slot to which a memory card is mounted, and has a moving image modefor recording moving image data onto a magnetic tape, and a still imagemode for recording still image data onto the memory card. Explanationwill be made of operations in the moving image mode first.

[0026] In FIG. 1, reference numeral 101 is an image pickup circuit,which is comprised of an optical system 103 including a lens, adiaphragm and the like; and an image pickup element 105 including a CCD,a drive circuit and A/D converter therefor and the like. In theapparatus in FIG. 1, the image pickup device is a single CCD arrangedwith a general complimentary color filter, and the number of pixels ofthe CCD is approximately 2,000,000 pixels, and this outputs image dataof a UXGA size having 1600 effective pixels horizontally and 1200effective pixels vertically per single frame. According to the presentembodiment, the color filters of the CCD is comprised of Cyan (Cy),Yellow (Y), Green (G) and Magenta (Mg), and is arranged as shown in FIG.2.

[0027] When the image data is to be read out from the CCD, in the movingimage mode, it is generally the case that the pixels of two adjacentlines are added and read out the addition result. The read-out operationperformed by the image pickup circuit 101 is controlled by means of acontrol circuit which is not shown in the diagram, and when the movingimage recording mode is set by means of an operation switch 141, theimage signal is read out as described below.

[0028] For example, in the case of the array shown in FIG. 2, the imagesignal from a first field in the image data of one frame is read out inthe following order : N-th line+(N+1)-th line, and then (N+2)-thline+(N+3)-th line. The image signal from a second field is read out inthe order of (N+1)-th line+(N+2)-th line, and then (N+3)-thline+(N+4)-th line.

[0029] The digital image signal outputted form the image pickup circuit101 is outputted through an input terminal 109 to a camera signalprocessing circuit 111. The camera signal processing circuit 111performs clamp processing on the image data outputted through the inputterminal 109, white balance processing, and then color separationprocessing. Additionally, after outline-correction processing andγ-correction processing are performed, a matrix circuit converts theimage data into a luminance signal Y and a color difference signals Crand Cb, and in the moving image mode, the converted image signal isoutputted to a reduction circuit 113.

[0030] The reduction circuit 113 uses an LPF to place a band restrictiontwo-dimensionally in vertical direction and horizontal directions of theimage signal outputted from the camera signal processing circuit 111.Then, the image signal subjected to the band restriction is sub-sampledwith a sampling structure conforming to the ITU-R601 standard, whichproduces the result that the number of pixels of the one frame of theimage signal outputted from the camera signal processing circuit 111 isconverted into a predetermined number of pixels according to adetermined format for recording onto a tape T, such as 720 horizontalpixels by 480 vertical pixels in the case of the present embodiment asshown in FIG. 3, and thereby reducing the size.

[0031] The image signal processed by the reduction circuit 113 iswritten to a memory circuit 115. The memory circuit 115 has sufficientcapacity to store an image signal having the above-mentionedpredetermined number of pixels equivalent to the number of pixels in oneframe, such as 720 by 480 pixels, as a base band signal, which is to saythat the image signal has not been treated with compression or encodingprocessing.

[0032] The image signal recorded in the memory circuit 115 is read outby a video image processing circuit 117 synchronizingly with the timingto which the signal is supposed to be outputted. The video imageprocessing circuit 117 performs known composition processing and specialeffect processing such as electronic zooming processing, wipe, or fadeon the image signal read out from the memory circuit 115, and then itoutputs the image signal to a video image output circuit 119. The videoimage output circuit 119 adds a horizontal and vertical synchronizationsignal to the image signal from the video image processing circuit 117,converts the image signal into an ITU-R601/R656-conforming digital videoimage signal, and outputs it through an output terminal 121 to a videoimage recording processing circuit 135.

[0033] The video image recording processing circuit 135 performs knownblock encoding processing on the digital image signal outputted throughthe output terminal 121, and thus compresses an amount of itsinformation. Then, the compressed and encoded image data is subjected toaddition of synchronization data and ID data, or is subjected to errorcorrection encoding or other such processing, thereby generating anarray of data to be recorded and outputting it to a recording circuit137. The recording circuit 137 performs processing such as digitalmodulation on the array of data to be recorded which has been outputtedfrom the video image recording processing circuit 135, and forms a greatnumber of tracks onto the tape T by means of a revolving head, therebyrecording the data array.

[0034] Next, explanation will now be made of the still image mode. Thestill image mode is a mode for extracting one frame from an image signaloutputted from the image pickup circuit 101 in response to the operationof the shutter button of an operation switch 141 for recording the stillimage, and recording the extracted frame onto a memory card M as thestill image data.

[0035] When a still image recording switch of the operation switch 141is operated, the image pickup circuit 101 reads out from the CCD in anon-additional fashion the image signal of one frame according to theoperation timing of the still image recording switch, and outputs theimage signal of this one frame to the input terminal 109.

[0036] In other words, when the still image recording switch is in astate of not being operated, the image pickup circuit 101 reads out theimage signal in the additional fashion as described above, and outputsthe image signal to a monitor not shown in the diagram. Therefore, whilein a state of waiting to record the still image, it is possible for auser to confirm the standard moving image data by means of the monitor.Then, when the user operates the still image recording switch, the imagepickup circuit 101 reads out the image signal of the one frame in thenon-additional fashion according to the operation timing of the switch.

[0037] For example, in the case of the filter array shown in FIG. 2, inthe non-additional read-out, the image signal of the first field is readout in the order of N-th line and then (N+2)-th line, and the imagesignal of the second field is read out in the order of (N+1)-th line andthen (N+3)-th line, whereby the image signal is read out without thepixels of adjacent lines being added to each other.

[0038] The image signal of the one frame, which has thus been inputtedfrom the input terminal 109, is outputted to a memory interface circuit123 once and then recorded to a still image memory circuit 125.

[0039] The memory interface circuit 123 is controlled by a control CPU133 which receives an instruction from the operation switch 141, and thecircuit 123 writes and reads out the image data to and from the stillimage memory circuit 125. The still image memory circuit 125 hassufficient capacity to store uncompressed image data of the one framehaving a number of pixels equivalent to the number of effective pixelsin the CCD of the image pickup circuit 101.

[0040] Further, in the present embodiment, a versatile SDRAM(Synchronous Dynamic RAM) is used for the still image memory circuit.Therefore, the memory interface circuit 123 follows a standard of theversatile SDRAM, which is used as the still image memory circuit 125, topacket the image data from the input terminal 109, attach a command tothe packets and accesses the still image memory circuit 125.Additionally, in order to enable extension of the memory, a sufficientnumber of address to be generated by the memory interface circuit 123for the versatile SDRAM are secured. Further, in the present embodiment,it is possible to use a versatile SDRAM having storage capacity of morethan 64 megabits for the still image memory circuit 125, for example.

[0041] The image data of the one frame, which was written into the stillimage memory circuit 125, is read out by being scanned sequentially(i.e., non-interlaced scan) by the memory interface circuit 123, and isoutputted to the camera signal processing circuit 111.

[0042] As in the moving image mode, the camera signal processing circuit111 performs clamp processing, white-balance processing and then colorseparation processing on the image signal outputted from the memoryinterface circuit 123, and further, after the outline-correctionprocessing and the γ-correction processing, a matrix circuit convertsthe image signal into a luminance signal Y and a color differencesignals Cr and Cb. After the image signal of the one frame has beenprocessed by the camera signal processing circuit 111, it is outputtedagain to the memory interface circuit 123 and stored into the stillimage memory circuit 125.

[0043] After the image signal of the one frame is converted into theluminance signal and the color difference signal and written to thestill image memory circuit 125, then it is read out by the memoryinterface circuit 123 in a sequence which is appropriate for processingby a still image processing circuit 127 and outputted to the still imageprocessing circuit 127.

[0044] The still image processing circuit 127 follows the JPEG standardto encode the image signal outputted from the memory interface circuit123, and outputs the image signal to the still image output circuit 129as still image data. The still image output circuit 129 converts thestill image data from the still image processing circuit 127 into dataof a format conforming to a file format used by a memory card interface139, and outputs the still image data through the output terminal 131 tothe memory card interface 139. The memory card interface 139 designatesa write address on the memory card M and records onto the memory card Mas one file the encoded still image data of the one frame, which wasoutputted from the output terminal 131. The memory card M is constructeddetachably to the VTR 100 through the memory card slot provided to theVTR 100.

[0045] Here, in FIG. 1, the camera signal processing circuit 111, thereduction circuit 113, the memory circuit 115, the video imageprocessing circuit 117, the video image output circuit 119, the memoryinterface circuit 123, the still image processing circuit 127, the stillimage output circuit 129 and the control CPU 133 are built on the sameintegrated circuit 107. Meanwhile, the still image memory circuit 125 isbuilt as a separate circuit from the integrated circuit 107.

[0046] In other words, in the present embodiment the bulk of thecircuits relating to the moving image processing and the still imageprocessing are placed on the same integrated circuit 107, which canattain equalization of the characteristics of the circuits andsuppression of electrical power consumption. Also, among the circuitsrelating to the moving image processing and the still image processing,if the still image memory circuit 125 is formed as a separate circuitfrom the integrated circuit 107, and this produces the result thatoperations may be carried out easily even when the number of pixels ofthe CCD used for the image pickup circuit 101 is great.

[0047] That is, even in the case where the number of pixels of the CCDused for the image pickup circuit 101 becomes greater, the reductionprocessing performed by the reduction circuit 113 is modified accordingto the size of the image signal from the image pickup circuit 101, and astill image memory 125 is provided with, for example a plurality of128-megabit versatile SDRAMs or 64-megabit versatile SDRAMs or the likehaving capacity corresponding to the size of the image signal from theimage pickup circuit 101, thereby becoming it possible for operations tobe carried out easily.

[0048] Further, regarding the memory 115 for processing the movingimage, the number of pixels of the image signal handled in the movingimage processing is a predetermined number determined according to theformat to be used for recording onto the tape T, which is fixed at 720pixels by 480 pixels. Therefore, even if the number of pixels of the CCDis changed, there is no need to change the capacity of the memorycircuit 115 in response to the change in the number of CCD pixels.

[0049] Considering the fact that the number of pixels of the imagesignal may be increased as mentioned above, it is desirable to secure inadvance sufficient addresses which are to be generated at the memoryinterface circuit 123, as mentioned above.

[0050] Further, considering a function for consecutive image capturing,for the memory capacity of the still image memory circuit 125, a memoryhaving sufficient capacity for several frames may be used.

[0051] Next, explanation will be made of Embodiment 2 of the presentinvention.

[0052] In the apparatus of FIG. 1, the memory circuit 115 for theprocessing of the moving image is arranged on the integrated circuit107; however, it is also possible to use a versatile SDRAM and constructthe memory circuit 115 as a separate circuit like the still image memorycircuit 125.

[0053]FIG. 4 is a diagram showing a construction of a VTR 100 which isintegrated into a camera, in the case where the versatile SDRAM is alsoused for the memory circuit for processing the moving image. In FIG. 4,the same reference numeral are used for constructions which are the sameas those in FIG. 1, and explanations thereof will be omitted.

[0054] In FIG. 4, in the moving image mode, the image signal reduced bythe reduction circuit 113 is outputted to the memory interface circuit123. The memory interface circuit 123 generates the write address inresponse to the control signal from the control CPU 133, and writes tothe memory circuit 143 the image signal outputted from the reductioncircuit 113. Then the memory interface circuit 123 reads out the imagesignal from the memory circuit 143 in synchronism with a predeterminedoutput timing, and outputs the image signal to the video imageprocessing circuit 117.

[0055] Also, operations in the still image mode are similar to those ofthe apparatus of FIG. 1.

[0056] In the present embodiment, the versatile SDRAM is used for thememory circuit 143, whereby ease of use is improved further.

[0057] That is, in the case where the number of pixels of the CCD whichis used for the image pickup circuit 101 exceeds 360,000 pixels, then a32-megabit versatile SDRAM is used for the memory circuit 143 and thestorage region of the memory circuit 143 is divided into a moving imageprocessing region and a still image processing region, whereby itbecomes possible to achieve the moving image data processing and thestill image data processing without specially having to provide a stillimage memory circuit 125.

[0058] On the other hand, in the case where the number of pixels of theCCD increases, the processing of the still image data, which has morepixels than the moving image data, is made possible by newly adding astill image memory circuit 125 in addition to the memory circuit 143.

[0059] In this way, by using the shared versatile SDRAM interface forthe memory circuit 143 for the moving image processing and the memoryinterface of the still image memory circuit 125, it thus becomespossible to process image signals ranging from an image signal having360,000 pixels to an image signal having a great number of pixels suchas more than 1,000,000 pixels, without making considerable changes tothe design of the circuit.

[0060] Note that, in the above-mentioned embodiments, the versatileSDRAM is used for the still image memory circuit 125; however, it isalso possible, of course, to use a memory other than this.

[0061] As mentioned above, according to the respective embodiments ofthe present invention, even in the case where the number of pixels ofthe image signal changes, it is still possible to process the movingimage and still image data easily. Further, even in the case where thenumber of pixels of the captured image signal changes, it is stillpossible to process the still image data easily, without having to alterthe design of the integrated circuit.

[0062] Many widely different embodiments of the present invention may beconstructed without departing from the spirit and scope of the presentinvention. It should be understood that the present invention is notlimited to the specific embodiments described in the specification,except as defined in the appended claims.

What is claimed is:
 1. An image pickup apparatus comprising: an imagepickup means for outputting an image signal having a first number ofpixels which is greater than a predetermined number of pixels; aconverting means for converting the image signal having the first numberof pixels, outputted form said image pickup means, into an image signalhaving the predetermined number of pixels; a first memory having storagecapacity corresponding to the predetermined number of pixels, forstoring the image signal having the predetermined number of pixels,outputted from said converting means; a second memory having storagecapacity corresponding to the first number of pixels, for storing theimage signal having the first number of pixels, outputted from saidimage pickup means; and still image processing means for outputting asstill image data the image signal having the first number of pixels,read out from said second memory.
 2. An apparatus according to claim 1,wherein said converting means, said first memory and said still imageprocessing means are provided on a same integrated circuit, and saidsecond memory is built as a separate circuit from said integratedcircuit.
 3. An apparatus according to claim 2, further comprisingspecial effect means for performing a special effect processing on theimage signal having the predetermined number of pixels, stored in saidfirst memory and outputting the thus-processed image signal, whereinsaid special effect means is provided on said integrated circuit.
 4. Anapparatus according to claim 2, further comprising output means forconverting the image signal having the predetermined number of pixels,stored in said first memory into a predetermined format and outputtingthe thus-converted image signal, wherein said output means is providedon said integrated circuit.
 5. An apparatus according to claim 1,further comprising recording means for recording onto a recording mediumthe image signal read out from said first memory, wherein thepredetermined number of pixels is a number of pixels determined inaccordance with a recording format of said recording means.
 6. Anapparatus according to claim 1, wherein said still image processingmeans includes encoding means for encoding the image signal outputtedfrom said second memory and compressing an amount of information of theimage signal.
 7. An apparatus according to claim 1, wherein said stillimage processing apparatus includes a moving image processing mode and astill image processing mode, wherein in the moving image processingmode, said image pickup means adds together signals of pixels ofvertically-adjacent lines of image pickup elements and reads out theadded signals, and in the still image processing mode, said image pickupmeans reads out the signal of each line of the image pickup elementsindependently.
 8. An apparatus according to claim 1, further comprising:moving image processing means for reading out from said first memory animage signal having the predetermined number of pixels and outputtingthe read-out image signal as moving image data; first recording meansfor recording to a first recording medium the moving image dataoutputted form said moving image processing means; and second recordingmeans for recording to a second recording medium, which is differentfrom the first recording medium, the moving image data outputted fromsaid still image processing means.
 9. An apparatus according to claim 8,wherein the first recording medium is a magnetic tape, and the secondrecording medium is a memory card.
 10. An image processing apparatuscomprising: an input unit arranged to input an image signal having afirst number of pixels which is greater than a predetermined number ofpixels; a conversion circuit arranged to convert the inputted imagesignal having the first number of pixels into an image signal having thepredetermined number of pixels; a first memory having storage capacitysufficient for the predetermined number of pixels, arranged to store theimage signal having the predetermined number of pixels, outputted fromsaid conversion circuit; a memory interface arranged to write into asecond memory having a storage capacity corresponding to the firstnumber of pixels, the image signal having the first number of pixels,outputted from the input unit, and read out from said second memory theimage signal having the first number of pixels; and a still imageprocessing circuit arranged to output as still image data the imagesignal having the first number of pixels, read out by the memoryinterface, wherein said input unit, said conversion circuit, said firstmemory, said memory interface and said still image processing circuitare provided on a same integrated circuit, and said second memory isbuilt as a circuit different from said integrated circuit.
 11. An imagepickup apparatus comprising: an image pickup means for outputting animage signal having a first number of pixels which is greater than apredetermined number of pixels; converting means for converting theimage signal, having the first number of pixels, outputted from saidimage pickup means into an image signal having the predetermined numberof pixels; a first memory for storing the image signal having thepredetermined number of pixels; a second memory for storing the imagesignal having the first number of pixels; a memory interface for writingto said first memory the image signal having the predetermined number ofpixels, outputted from the converting means, reading out from said firstmemory the image signal having the predetermined number of pixels,writing into said second memory the image signal having the first numberof pixels, outputted from the inputted image pickup means, reading outfrom said second memory the image signal having the first number ofpixels; moving image processing means for outputting as moving imagedata the image signal having the predetermined number of pixels, readout from the first memory; and still image processing means foroutputting as still image data the image signal having the first numberof pixels, read out from the second memory, wherein said convertingmeans, said memory interface, said moving image processing means andsaid still image processing means are provided on a same integratedcircuit, and said first memory and said second memory are each built asindependent circuits from said integrated circuit.
 12. An apparatusaccording to claim 11, further comprising: first recording means forrecording onto a first recording medium the moving image data outputtedfrom said moving image processing means; and second recording means forrecording the moving image data outputted from said still imageprocessing means onto a second recording medium which is different fromthe first recording medium.
 13. An apparatus according to claim 12,wherein the first recording medium is a magnetic tape, and the secondrecording medium is a memory card.
 14. An image processing apparatuscomprising: an input unit arranged to input an image signal having afirst number of pixels which is greater than a predetermined number ofpixels; a conversion circuit arranged to convert the image signal havingthe first number of pixels, outputted from the input unit, into an imagesignal having the predetermined number of pixels; a memory interfacearranged to write into a first memory for a moving image the imagesignal having the predetermined number of pixels, outputted from saidconversion circuit, read out the image signal having the predeterminednumber of pixels from said first memory, write into a second memory theimage signal having the first number of pixels, outputted from the inputunit, and read out from said second memory the image signal having thefirst number of pixels; a moving image processing circuit arranged tooutput as moving image data the image signal having the predeterminednumber of pixels, read out from said first memory; and a still imageprocessing circuit arranged to output as still image data the imagesignal having the first number of pixels, read out from the secondmemory, wherein said input unit, said conversion circuit, said memoryinterface, said moving image processing circuit and said still imageprocessing circuit are provided on a same integrated circuit, and eachof said first and said second memory is built as a circuit independentof said integrated circuit.